Most of the microcircuits used in Aerospace, Defense and High Performance (ADHP) applications today are commercial-off-the-shelf (COTS) components targeted for markets other than ADHP, with required lifetimes that are typically significantly shorter than those of ADHP applications. COTS component manufacturers evaluate their components’ expected lifetimes in the target applications, but provide little or no information for ADHP applications. Thus, it is the responsibility of the ADHP user to conduct the appropriate analyses and, where necessary, mitigate for shorter-than-required lifetimes.
Types of failure
- Infant Mortality (or early life failure) is typically due to manufacturing defects, or issues in product design or assembly. Such failures are screened out by reliability tests (HTOL, burn-in) performed by device manufacturers.
- Constant Failure Rate is a period with random failures at a very low rate. Such failures are exhibited by products that have survived early life failures.
- Wear-out failure is intrinsic failure resulting from material degradation in the active regions, dielectrics, and conductors of silicon devices and performance degradation for transistors. The integrated circuit manufacturing process involves formation of a large number of transistors and interconnect metals using different types of material.
Typically, such failures occur according to non-random, or non-constant failure rate distributions, and are thus expressed in terms of “time-to-failure,” or “failure fraction.” Early wear-out occurs when the microcircuit lifetime is shorter than the life requirement in the ADHP equipment.
Aerospace, Defense, Automotive and High Performance Computing applications are targeted for long-term usage and reliable operation in the field. Therefore, they are subjected to wear-out failures.
How to evaluate performance of ICs
IC wear-out analysis assesses and mitigates the effects of early wear-out in microcircuits used in high performance applications.
Using a Physics of Failure approach to characterize each failure, the analysis considers the following intrinsic wear-out failure mechanisms:
- Hot Carrier Injection (HCI) describes the phenomenon by which carriers gain sufficient energy to be injected into the gate oxide causing damage at the interface or within the oxide. This mechanism will result in transistor drive current degradation.
- Time Dependent Dielectric Breakdown (TDDB) describes dielectric failure when a conductive path forms in the dielectric, shorting anode and cathode. This mechanism will result in increased leakage across gate oxide resulting in breakdown.
- Negative Bias Temperature Instability (NBTI) is a wear-out mechanism experienced by positive metal-oxide semiconductor field-effect transistors (pMOSFETs) with negative bias. Damage due to NBTI may lead to pMOSFET parameter changes (threshold voltage increase, drive current reduction).
- Electro Migration (EM) is a failure mechanism caused by high current density and/or high temperature resulting in voids in metal lines.
Depending on the device design, materials, and fabrication technology, one of these mechanisms is likely to dominate in any given ADHP application.
DfR Solutions’ IC wear-out analysis uses models and methodologies to determine the characteristic lifetime for each mechanism, and failure probability, failure rate and characteristic life for the component as a whole. These analyses help determine if the selected IC is right for the high reliability application. Further, this approach will give the user a warning if it does not meet the lifetime requirement, and an opportunity to mitigate and address risks.
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