Most electronics failures are due to thermal cycling, and are generally traced to two causes: circumferential cracking on the walls of plated through holes, and solder joint fatigue.
Since the root causes of the failure are known, designing boards to address thermal cycling appears to have a direct solution. However, when the nuances of optimizing the materials, their properties, configurations and testing protocols are factored in, the design solution is anything but “simple.”
Likewise, proper reliability analysis can be complicated since results must be tied to field tests that themselves provide varying degrees of feasibility. To do this in a meaningful way, it’s important to understand the prevalent thermal testing challenges and reliability prediction solutions.
Thermal Testing Challenges
Circumferential cracking and solder joint fatigue present obstacles to reliability because board elements undergo thermal tests that provide uncertain results:
Plated Through Holes
For plated through holes, expansion and contraction in all planes is not uniform due to glass fiber constraint. The x and y planes are relatively immobile, whereas the z plane expands and contracts at very high rates.
IPC-TR-579, the industry-accepted model, is assumed to account for this variance; however, it was developed nearly two decades ago and there is no protocol ownership or ability to assess complex geometries. Further, IPC-TR-579 is analytical and must be validated through testing.
Some components are consistently poor thermal performers, requiring targeted robustness assessment. Evaluations vary depending on the industry:
- Industry/Military specifications are low cost and are based on industry-accepted numbers that haven’t been revised in 20 years. This leaves a considerable gap in accounting for new factors that have evolved, leaving results to vary significantly on either side of the actual data.
- JDEC testing, used by component manufacturers, requires 2,300 cycles at 0-100C and is generally performed on very thin boards. If board thickness changes after testing, the results are immediately rendered invalid.
- IPC testing, used by electronics OEMs, is done on boards of similar thickness to the design and requires 6,000 at 0-100C. Like JDEC, if the board thickness is altered, results are of no value.
While designers cannot change the CTE of component properties, they can influence the CTE of the overall board through their selection of board materials and properties:
- Glass has a low CTE; resin has high CTE
- Board thickness and stiffness, if changed during production, can result in partial or complete inaccuracies in thermal testing
- Solder alloys perform differently based on stress level and dimensions – tin lead withstands very high stress; SAC is ideal for moderate stress; and PB-Free is the choice for high performance
Reliability Prediction Solutions
Relating results to field tests is the most important aspect of testing and analysis, and the process chosen must be carefully considered due to its impact on reliability.
Traditional methods, by their nature, fall short on field testing, thermal cycling analysis and reliability prediction:
Norris Landzberg’s “back of the envelope” approach offers a general idea of the acceleration factors between the field and test conditions, but it is not reliable for statistical validity. Further, it does not account for part geometries or properties.
Solder fatigue calculations are purely analytical and account for part and board properties; however, they must be validated against testing prior to predict reliability.
Sherlock Automated Design Analysis™ Software, on the other hand, fully automates reliability prediction using Physics of Failure (PoF). The files the design team creates for the manufacturer are the same ones used to create virtual boards in Sherlock. Engineers import data and use the powerful computerized tool to identify stressors induced by thermal cycling like circumferential cracking and solder joint fatigue, analyze results and dig into board reliability predictors, including:
- Cumulative Damage Index (CMI)
- Accurate time to failure
- Accurate thermal profiling of each board component