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Temperature Cycling and Fatigue in Electronics

Posted by Gilad Sharon, PhD. on Aug 12, 2016 6:28:55 PM

The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials.

CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies. 1st level interconnects connect the die to a substrate. This substrate can be underfilled so there are both global and local CTE mismatches to consider. 2nd level interconnects connect the substrate, or package, to the printed circuitboard (PCB).This would be considered a “boardlevel” CTE mismatch.Severa lstress and strain mitigation techniques exist including the use of conformal coating.

Topics: temperature cycling, Thermal Cycling, Fatigue, reliability, solder joint reliability

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Thermal Cycling and Fatigue

Posted by Gil Sharon on Jul 25, 2016 11:23:24 PM

The majority of electronic failures are thermo-mechanically related by thermally induced stresses and strains. The excessive difference in coefficients of thermal expansion between the components and the board cause a large enough strain in solder and embedded copper structures to induce a fatigue failure mode. In this paper we will present the solder fatigue failure mechanism and the PTH fatigue failure. The solder fatigue failure is more complicated due to the many solder materials and different solder shapes. One example of solder fatigue occurrence is a ball grid array (BGA) solder ball. The following figure shows a cross section of a solder ball with the corresponding finite element model. The predicted location of maximum strain corresponds to the same location of solder fatigue crack initiation.

Topics: Thermal Cycling, Fatigue, electronic failures

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