The reliability requirement for Concentrated Photovoltaic (CPV) installations is for the system to survive for 25 years in virtually any environment. Classically, some form of thermal epoxy has been used as the Thermal Interface Material (TIM). This material is usually a filled epoxy that provides some level of thermal transfer, yet can still withstand multiple thermal cycling excursions. These epoxies result in poor thermal conductivity which prevents migration to higher concentration levels and greater efficiencies. As such, epoxies may run into problems as CPV concentrations exceed 1000 suns. This mix of materials will provide insufficient reliability to achieve the 25 year lifetime requirement.
These extensive life requirements coupled with short development cycles that demand “proof of concept” before hardware build and then waiting until test to validate the reliability requirements is a high risk proposition. What is needed is a methodology for performing a reliability prediction of the interconnect structures in the concept and design stage. This paper describes the convergence of two unique technologies, the Indium Corporation NanoFoil and Heat Spring Technologies and new reliability algorithms developed by DfR Solutions to provide direct predictive solutions to these industry-limiting issues.
Figure 1 shows examples of the different and unique types of system level installations that are currently being implemented to maximize the exposure of the CPV cells to the sun.
Within these systems are again a variety of approaches for the actual concentration methods. Figure 2 illustrates some of these approaches. For the purposes of this analysis a typical CPV receiver consisting of a triple junction die, a ceramic substrate with Direct Bond Copper (DBC) on both sides, 2 protection diodes and interconnect terminations was evaluated.
Figure 3 is a cartoon cross section that shows the area of interest with respect to improved thermal transfer and increased reliability for the CPV module. The TIM1 interface between the CPV Module and the heat sink, where the epoxy is generally placed, is the weakest link in the stack-up and that is where DfR focused its predictive efforts.
Reactive NanoTechnologies (RNT), now part of Indium Corporation, commercialized a new technology that revolutionizes how manufacturers join components using solder materials. (See Figure 4) The joining process is based on the use of reactive multilayer foils as local heat sources. The foils are a new class of nano-engineered materials, in which self-propagating exothermic reactions can be ignited at room temperature through an ignition process. By inserting a multilayer foil between two solder layers and two components, heat generated by the reaction in the foil melts the solder and consequently bonds the components. The joining process can be completed at room temperature in air, argon or vacuum in approximately one second. The resulting metallic joints exhibit thermal conductivities two orders of magnitude higher and thermal resistivities an order of magnitude lower, than current commercial TIMs.
The use of reactive foils as a local heat source eliminates the need for torches, furnaces, or lasers, speeds the soldering processes, and dramatically reduces the total heat that is needed. Thus, temperature-sensitive or small components can be joined without thermal damage or excessive heating. In addition, mismatches in thermal contraction on cooling can be avoided because components see very small increases in temperature. This is particularly beneficial for joining metals to ceramics.
Figure 5 illustrates how this technology can be applied to a CPV Receiver implementation where the NanoFoil is placed in between two solderable surfaces on the DBC receiver and heatsink. Initially the solder was bulked up on the two surfaces, but later was transitioned to the 2nd technology of interest, that of the Heat Spring Solder Technology.
Heat Spring is a “Green” TIM material made from either Indium or Indium Tin solder alloys. The surface is somewhat embossed to reduce the contact resistance when included in a stack-up. The material is a high conductivity (86 w/mk) composition that can be cut into preforms that match the NanoFoil and be placed in the stack-up in lieu of bulked up solder on the surfaces. Figure 6 (left) illustrates a typical perform and the image on the right shows how the TIM material is placed in a stack-up.
Combining these two technologies provides a solder interface between the CPV receiver and the heatsink rather than an epoxy bond. The results obtained for thermal conductivity improvement and also reliability will be discussed in the subsequent sections of this paper. To properly assess the performance improvement it is necessary to define the parameters for the impinged sun concentration levels.
1 Sun = 85 mW/mm2 x 500 = 425 mW/mm2
Die Surface Area = 100mm2
Power Incident Die Surface = 42.5W
Conversion Efficiency = 35%
Pdc = 14.9 W
Pdiss = 27.6 W – Thermal Management
Conversion Efficiency ~ 0.5% / 10° C
Maintain < 100°C to Meet 25 Year Life Time
Sun Concentration Levels
Typically ~ 500 X (Suns)
CPV Roadmaps – X will Continue to Increase
These parameters are summarized in Figure 7 which shows a comparison between an epoxy having a thermal conductivity of approximately 3 w/mk as compared to the solder stack-up of 42 w/mk derived from the NanoFoil and Heat Spring configuration. Clearly the solder approach provides significantly better results. The comparison shows that the NanoBonded approach never goes above the 100C maximum temperature for the CPV, even out to 3000 suns, whereas the epoxy approach gets into a problematic area at around 2000 suns.
Figure 8 summarizes the results of temperature cycling the CPV modules with NanoBonded units being compared to two different types of epoxy attachment. Laser Flash measurements were made after each subset of cycles for comparison purposes.
The results in Figure 8 show the stability of the soldered bonds as the thermal resistance measurements remained relatively unchanged. However, for the epoxy bonds, the thermal resistance of the 3M epoxy is creeping up during the test and the EpoTek material failed during the temperature cycling.
DfR has extensive experience in developing material degradation algorithms for electronics applications. The models defined in this paper have been adapted to assess cycles to failure for Concentrated Photovoltaic (CPV) receiver modules having a typical CPV architecture of:
Several parameters were inputted to the model to achieve the results obtained. These included:
Direct Bond Copper (DBC) Architecture
Figure 9 (left) illustrates the result obtained for the construction noted with the bondline being a total of 400 microns thick. The right image shows the results for a 250 micron bond line thickness. The results clearly demonstrate the influence of minimum temperature (mountain vs. desert), change in temperature, and bondline thickness. The use of this modeling approach allows for tradeoff analysis and rapid assessment of existing interconnect materials and architecture
DfR and Indium have identified a turn-key solution for the reliability assurance of CPV modules utilizing new materials and technologies for radical improvement in interconnect robustness. This was accomplished using commercially available NanoBonding and Heat Spring technologies.
DfR also generated a viable interconnect reliability algorithm adapted to assess cycles to failure for Concentrated Photovoltaic (CPV) modules as shown above.
DfR represents that a reasonable effort has been made to ensure the accuracy and reliability of the information within this report. However, DfR Solutions makes no warranty, both express and implied, concerning the content of this report, including, but not limited to the existence of any latent or patent defects, merchantability, and/or fitness for a particular use. DfR will not be liable for loss of use, revenue, profit, or any special, incidental, or consequential damages arising out of, connected with, or resulting from, the information presented within this report.
Traditional solder bumps are being bumped aside by copper pillar technology. Used as a first-level interconnect, copper pillar technology is increasing in popularity as a way to deal with decreasing feature sizes on silicon, mobile device form factors, and other technical challenges of today’s flip chip devices. Compared with traditional solder bumps, copper pillar technology provides greater control of the joint diameter and standoff height, enabling the creation of finer-pitch joints.