Failure Analysis: The Right Way Counterfeit Diode Investigation

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A DfR customer received diodes through broker distribution channels that had shown a very high failure rate during in-process testing. Testing of “as received” diodes showed a significant portion of the diodes did not meet their data sheet reverse breakdown voltage and reverse current specifications. Failure analysis on sample diodes that did not meet their electrical characteristics indicated high current stress damage.

In-house diodes were screened electrically for reverse breakdown voltage/leakage current. A sample of 24 diodes that passed this screening was subjected to a Steady State Operation Life test in accordance with MIL-PRF-19500/477G, Para. and Mil Std 750 Method 1026. The sample of 24 diodes was initially checked for electrical performance per group A (reverse breakdown voltage, reverse current, forward voltage drop at 4A pulse and forward voltage drop at 6A pulse). All diodes passed. At 250 hours into the 1000 hour steady state life test the test articles were subject to an interim group A electrical test. At that point diode D21 was reported as failed.

Experimental Procedure

The failed diode was subjected to the following analyses:

  • X-ray Imaging
  • Electrical Characterization
  • Decapsulation, Cross-Sectioning with Optical Microscopy was performed to inspect the die for damages

X-ray imaging

Initial examination of D21 was performed through X-ray. The X-ray images were taken at three different magnifications and at different X-ray energies, allowing the viewing of the molding compound, the insulation and the die as well. No definitive anomalies were identified. Example images are shown below.

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Electrical Characterization

Figure 1 shows the small signal current voltage characteristic of diode D21. At -3V bias, the reverse current is approximately -20mA. The diode is shorted exhibiting a resistance of 150 Ohms.

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Diode D21 was cross-sectioned for further investigation of the die. Shown below is the picture of the die sandwiched between the leads. The dark line inside the die was identified as a metallic layer with a definitive variation in thickness. Two subsequent picture series show the die area from top to bottom (next page, left image) and the active region of the die (next page, right image).

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Failure Site

DFR Solutions performed sequential cross sectioning on D21 with curve tracing performed in between grinding/polishing steps. Cross sectioning proceeded to the center of the diode without any change in the curve trace signature. Just beyond the center of the diode the curve trace showed that the fault was no longer present (see Figure 2). A finer polish was performed to see if any artifacts of the fault remained. A crack in the bulk silicon is visible (Figure 3). The loss of the failure signature by grinding a small distance further into the diode suggests a highly localized failure site of the short.

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The diode — with approximately half of the area still present — still exhibited a high reverse leakage current of -370μA at -160V (see Figure 4). This indicates the presence of a distribution of failure sites across the die, of which one failed catastrophically.

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Electron Microscopy

Energy dispersive spectroscopy (EDS) performed during examination by electron microscopy identified silver as the primary element in the metallic layer. A small amount of gold was also identified.

As can be seen in the figure to the right, gold energy transition peaks at 2.120 keV (Au Mα) and at 9.710 keV (Au Lα1) are evident in “Spectrum 3” and “Spectrum 2”. The image resolution of “Spectrum 1” is unfortunately insufficient to clearly prove the presence of gold in the silicon, but the Au Mα peak seems to be present.

Gold is known to be used as a dopant in fast-recovery diodes. While contamination of silver does not necessarily lead to a strong degradation of the diode properties, contamination with gold is known to degrade the junction performance severely.

Metal contamination

Metal contamination of silicon can occur throughout the fabrication process. Impurities can be introduced by contaminated wafer handling, improper surface or etching treatments, by the presence of a contaminated gas atmosphere during high temperature treatments, or by inappropriate post-processing of metallized devices. The influence of these contaminants will depend on the type of contaminant, its concentration, and the environmental parameters, time and temperature, the silicon device experiences after exposure to the contaminant.

Silicon p-n diodes are the oldest and one of the most common of all semiconductor devices. A p-n diode is created by doping silicon wafers with Group III elements (such as boron) to create p-type layers and Group V elements (such as phosphorous) to create n-type layers.

Silicon power diodes are also more susceptible because their manufacture requires higher temperatures and longer diffusion times compared to standard semiconductor technology. Additional steps after wafer production, such as welding and glass sealing, can also involve temperatures high enough to induce the diffusion of excessive amounts of impurities.

Crystallographic defects present in the silicon, such as vacancies, dislocations, and stacking faults, can have a large effect on the solubility and diffusivity of transition metal impurities. As a result, the solubilities and diffusivities provided in Figure 5 and Figure 6 are based upon research-level purity silicon wafers and are not necessarily appropriate for silicon wafers with different defect characteristics. Taking the bulk diffusivity values in Figure 5 and assuming Fickian behavior, it can be seen that the present interface metals silver and gold will all easily diffuse to the junction of the silicon die over the time and temperatures used during the bonding and glass sealing processes

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Because the solubility has a steep temperature dependence, upon cooling from high temperatures the transition metal atoms will tend to exceed their saturation limit in silicon. In response to the changing equilibrium condition and the increasing driving force to nucleate, the impurity atoms can exhibit four different behaviors:

The impurity atoms will diffuse to the surface of diode (outdiffusion) and form precipitates at the surface. This process requires a high diffusion rate, such as found in nickel and copper (see Figure 5).

The impurity atoms will precipitate within the bulk of silicon. For homogeneous nucleation, a high diffusion rate and high solubility are necessary. For heterogeneous nucleation, a high diffusion rate and the presence of crystallographic defects are required.

The impurity atom remains dissolved within the bulk of the silicon. This process requires low diffusion rates coupled with high cooling rates. Dissolved impurities are electrically active and form deep energy levels within the silicon band gap.

The impurity atoms form complexes with other impurities present in the silicon. These complexes are unstable and will result in changes in the electrical behavior with variations in the external stimuli, i.e., temperature, current, etc.

The following paragraphs will review the influence of silver, and gold on the electrical properties of p-n diodes.


Silver is also a fast diffuser in silicon (see Figure 5). Silver acts as a singly ionizable donor in pand n-type silicon. In p-type silicon, the donor level is 0.26eV above the valence band; in n-type silicon, the acceptor level is 0.29eV below the conduction band. Previous work has found that at room temperature. Because the capture cross-section at room temperature for silver atoms is low[2], carrier mobilities and carrier lifetimes in silicon diodes are relatively unaffected by the introduction of large concentrations of silver.


Because gold acts as a strong recombination center in silicon, it has been widely used as a dopant to control minority carrier lifetime and improve the speed of semiconductor devices. However, the unintended doping of silicon with gold can lead to the degradation of important electrical properties. Tolerable gold impurity content during wafer production is often much less than 1012 cm-3, which necessitates the use of Deep Level Transient Spectroscopy (DLTS) for impurity detection. Concerns about gold impurity have led to stricter quality control during wafer processing and replacement of gold as a rear contact material. These steps have led to a reduction in the frequency of excessive gold contamination.

The contamination of silicon with gold is easily performed by the mechanical contact of gold with silicon because gold rapidly migrates into silicon, even at low temperatures (< 800°C). As an example, Mielke3 and Makhkamov4 measured a three orders of magnitude increase in the gold concentration in silicon, from 1010 cm-3 to approximately 1013 cm-3, after a heat treatment of 800°C for one hour. This high diffusion rate is in part due to the formation of a gold-silicon eutectic at 370°C. With increasing temperatures, this liquid phase acts as a rapid diffusion source.

Gold diffusion in silicon occurs by an interstitial-substitutional process. The diffusivity of interstitial gold is very high while the solubility is low. The reverse is true for substitutional gold, which has a low diffusivity and a high solubility5. The net result is that the diffusive flux is carried almost entirely by interstitial diffusion. The interstitials can then combine with vacancies in the silicon lattice to form substitutional defects. These substitutional gold defects are electrically active and will tend to have the greatest effect on the electrical properties of the p-n diode.

Gold tends to have a greater influence on junction behavior than other transition metals, because the position of acceptor energy level for substitutional gold in n-type silicon, -0.54eV below the conduction band edge or in the middle of the band gap, makes gold a very effective recombination center. In addition, since gold introduces both a deep donor and acceptor in silicon, it decreases the net carrier concentration in both p-type and n-type material.

Gold can also combine with iron impurities already present in the silicon crystal to create irongold complexes. These iron-gold complexes form between 200-300°C and can result in a reduction in the carrier lifetime by a factor of five in comparison to substitutional gold of equal concentration. It is therefore important to avoid the formation of iron-gold pairs. This requires avoiding gold contamination, since iron is almost always present in silicon wafers, at least in low concentrations. A summary of previous work on the effect of gold on the electrical properties of silicon diodes is provided below:


Gold increases the resistivity of silicon diodes by decreasing the net carrier concentration6.

Reverse Leakage Current

The leakage current in gold doped silicon can be estimated from I = qWANtet p , where q is the electronic charge, W is the depletion width, A is the area of the diode, Nt is the gold concentration, and et p is the thermal emission rate of holes from neutral acceptors7,8 (see Figure 7).

The reverse current at 1000V at 180°C was found to increase from 4 mA to 130 mA after diffusing gold into silicon at 865°C. Diffusion time and gold concentration were not provided9. Due to increases in the leakage current with increasing temperature, for a gold dopant level of 2x1014 cm-3, silicon p+-n diodes will become unstable at 150°C 8.

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Breakdown Voltage

The addition of gold for a p+-n junction results in a reduction in the electric field. For breakdown to occur, the electric field must reach a critical value. Therefore, the breakdown voltage of p+-n silicon diodes will increase with gold doping10 (see Figure 8). The breakdown voltage of golddoped p+-n silicon diodes changes with frequency11. There is a sharp decrease in the breakdown voltage in n +-p silicon diodes for gold diffusion temperatures greater than 800°C 12 (see Figure 9). The gold doping of silicon decreases the low-current (20 μA) breakdown voltage in n +-p diodes. Can also cause localized avalanche breakdowns, resulting in I-V curves with double break characteristics13.

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Forward Current

Forward current is also dependent upon gold concentration. The dependency is linear or square root depending if low current or high current densities7.

Junction Capacitance

The transition capacitance of silicon p-n diodes is frequency independent. When gold is added, the junction capacitance of gold-doped p+-n diodes becomes frequency dependent14 and varies with gold concentration10.


Cross-sectioning of the diode showed the failure sites being distributed across the die, with a catastrophic failure (150Ω) occurring very localized at one of those sites.

A review of the EDS data shows the presence of silver and gold close to the diode region. The silver is present in the die attach between the two dies, which is expected as silver is a common conductor in commercial die attach material. Since gold is frequently used as a dopant for fast recovery diodes, it is not clear whether the gold is present as part of the silver attach or as a dopant.

Gold is known to diffuse easily into the p-n region of a diode. The effects of gold contamination are among others reduction in reverse breakdown voltage and increased reverse leakage current, as well as increase in forward bias resistivity. Given the evidence of multiple failure sites, the presence of gold is the likely root-cause of diode failure and its presence in the critical regions of the die should be confirmed through the use of secondary ion mass spectroscopy (SIMS)


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How To Eliminate The Need For Failure Analysis

Nearly one-fifth of electronics designs that are tested fail. That means nearly one-fifth of electronics designs are reworked or scrapped in favor of a new design. The resulting production delays and cost overruns mount, further threatening profitability in an automotive industry that’s already grappling with the margin-shrinking impact of increasing price-based competition.