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Solder joints...interconnects...regardless of what you call it, this is the linchpin in the transition to Pb-free product. It is the primary material change. It is where the majority of the effort in reducing risk has been focused. So, is Pb-free solder just as reliable as SnPb? Simple question, complex answer. The best way to approach this discussion is to divide the issue into two questions:

• Quality: Can I make Pb-free solder with the same amount and type of defects seen in SnPb?
• Reliability: If I can make my Pb-free solder just as good as I did with SnPb, will it last just as long?

QUALITY

Pb-free vs. SnPb

Can I make my Pb-free product just as good as SnPb? Absolutely. Will you? That is another story. If you sort through all the articles, presentations, and experiences of assemblers, both internal and EMS, the overwhelming statement is that Pb-free can be manufactured just as good as SnPb, but the margins are narrower.

Narrower margins require a greater degree of control over the manufacturing process. Instituting greater control involves a multi-stage process.

Stage One: Design for Manufacturing (DfM)

• Wave Soldering:
  • Avoid Pb-free wave soldering any chip capacitors greater than 0805 case size.
  • Other design changes or concerns about component robustness are probably not necessary, as the temperatures components experience during the wave are much lower than that experienced during surface mount reflow.
• Surface Mount Reflow:
  • No design changes are necessary. Some companies are reducing their bond pads in response to the lower wetting of the SAC alloy. This reduces the incidence of false defect identification during visual inspection and can increase the solder joint height.
  • Re-evaluate tracking and control of component moisture sensitivity levels (MSL) as fewer components are MSL 1.

Stage Two: Understand your margins

• Wave Soldering:
  • Work with your wave soldering equipment manufacturer or an outside consultant to identify a potentially optimum wave soldering condition (preheat, conveyor speed, wave dimensions, etc.).
  • From this optimum wave soldering condition, develop an experimental design varying critical parameters so that you understand your process window (note: 260°C to 270°C are typically considered the maximum appropriate solder pot temperatures).
  • Consider a nitrogen blanket. Recent work suggests that this could pay for itself in regard to a reduction in solder consumption and defect rates.
  • What is the most critical manufacturing defect to be on the lookout for? Insufficient hole fill, especially under the largest components. Very strong concerns about this issue throughout the industry. Note: Fillet lifting has also been seen, but has been demonstrated to be not a reliability risk.
  • Perform visual inspection and cross-sectioning of critical components and critical areas of the board.
• SMT:
  • Roughly the same process as wave soldering. Identify a potentially optimum solder condition and then vary some of the critical parameters to understand your margins.
  • Perform visual inspection and cross-sectioning of critical components and critical areas of the board.

Quality — Mixed Solder

One of the major concerns of companies not switching to Pb-free is the ability to make robust solder joints out of Pb-free ball grid arrays (BGAs) and SnPb solder paste. Sufficient robustness can be maintained under two conditions:

• Maintain a minimum peak temperature of 225°C (some OEMs increase this to 245°C)
• Talk to your solder paste manufacturer about minimizing voiding that can occur when a SnPb solder paste is subjected to a “hybrid” reflow profile.

RELIABILITY

DfR Solutions has created a comprehensive presentation outlining the problems and potential solutions for Pb-free product. This presentation is also available onsite and in a tailored format (specific to your designs, your operating environment, your reliability needs). For more information, please contact us at 301-474-0607 or send us an email. Below is a summary of Pb-free reliability issues from this presentation.

Cold Temperatures (Tin Pest)

Description:

White tin (beta phase) can transition to grey tin (alpha phase) at temperatures below 13°C (nominally only occurs at temperatures below -10°C). Because of a large volumetric increase, this transition can degrade the mechanical strength of the solder.

Risk:

Only with NASA (will require continuous exposure to -45°C or lower for greater than six months).

Why:

Very low levels of lead (Pb), 50 to 100 ppm, nominally found in “Pb-free” solder, tends to prevent tin pest. Silver (Ag) also does a good job in retarding the tin pest mechanism.

Cold Temperatures (Ductile-to-Brittle Transition)

Description:

SAC undergoes a ductile-to-brittle transition between -45 and -78°C.

Risk:

How many applications experience mechanical stress while exposed to temperatures below -45°C?

Why:

This behavior is nominal for metallic materials and occurs due to changes in dislocation mobility.

Hot Temperatures (Intermetallic Growth)

A presentation on intermetallic growth in Pb-free solders can be found here. There are two major concerns regarding intermetallic growth rates in Pb-free solders:

• How it influences performance during drop/mechanical shock events
• Abnormal growths (large whiskers, platelets) due to the absence of a Pb-rich phase

Abnormal growths are especially a concern as reliability prediction is predicated on the belief that the initial solder morphology can be predicted or is relatively consistent. If the abnormal growths periodically influence solder joint reliability (e.g., creation of a stress concentration), then predicting first failure in solder joints could become a game of chance.

Hot Temperatures (Kirkendall Voiding)

Kirkendall voiding occurs when voids form at the interface between two dissimilar materials due to differential diffusion. This mechanism has been seen in both SnPb and Pb-free solder.

The problem with Kirkendall voiding in Pb-free solder is that some combination of currently unknown factors seems to make the voiding much worse, especially after long-term exposure at elevated temperatures. Texas Instruments thermally aged BGAs at 125°C and experienced severe decreases in drop resistance; Cisco Systems also thermally aged BGAs at 125°C without any effect on drop performance.

In addition, products that could experience mechanical shock are not the only ones potentially affected. Solder joints exposed to a constant 75°C, a realistic condition in high-end server and telecom applications, could experience full separation, 100% voiding, in 6 to 7 years (recent proprietary work suggests this time frame could be much shorter).

Will this be a real problem? Hard to say. In the lab, severe Kirkendall voiding has been observed in SnPb solder. However, there has never been a documented field failure due to Kirkendall voiding in over 30 years of surface mount technology. Any hope? Not at the moment. Just like tin whiskers, there has been some excellent work characterizing Kirkendall voiding, but limited progress has been made on explaining why it is sometimes fatal. One entity currently investigating this phenomenon is the Universal Instruments Area Array Consortium (Binghamton, NY).

Thermal Cycling (Time to Failure)

The figurative pot of gold at the end of the rainbow has been understanding the reliability of Pb-free solder during thermal cycling. With this in mind, hundreds of thousands of hours of testing and characterization have been performed, numerous papers and presentations have been written, and predictive life models have begun to emerge.

So what’s the bottom line? Those companies who currently do not worry about solder joint fatigue can continue to make thermal cycling a low priority. For those companies with more demanding requirements, the data seems to suggest that Pb-free solder might under perform SnPb in a limited set of circumstances. For you to be concerned, all of the following criteria should exist:

• A component highly susceptible to solder joint fatigue (e.g., large chip resistors, ceramic BGAs, leadless ceramic chip carriers, non-underfilled chip scale packages)
• Maximum solder joint temperature greater than 80°C with dwell times greater than 4 hours (dwell times of concern will decrease as temperatures increase)
• At least one thermal cycle per day and a desired lifetime of at least 10 years (lifetimes of concern will decrease as frequency of cycles increase)

If you find yourself in the situation described above, quantify your risk by performing an accelerated life test based on existing Pb-free solder joint reliability models. Publicly available models include work by Amkor and the Fraunhofer Institute in Germany.

Side Note: One of the criticalities in determining an acceleration factor for Pb-free is the dwell time at high temperatures. IPC, via IPC-9701, recommends a dwell time of at least 30 minutes to maximize stress relaxation while still ensuring a reasonably short test time. Jean Paul Clech of EPSI has used his proprietary solder joint reliability model to argue that a 10-minute dwell time maximizes test efficiency.

The Norris-Landzberg (NL) equation was one of the earliest attempts to predict the failure of solder joints subjected to thermal cycling. While not a true solder joint model, since it requires information from one accelerated life test, it did allow for the construction of relevant accelerated life tests, including max temperature, min temperature, and number of cycles, that were based upon the expected field environment. The original NL equation for SnPb solder provided an acceleration factor (AF) based on...

...where ΔT is the difference between high temperature and low temperature during a given cycle, ƒ is the number of thermal cycles per day, Ea is 0.122eV/K, k is the Boltzmann constant, and T refers to the maximum temperature (K). The subscripts 0 and t refer to field and test conditions, respectively. This equation does assume that the ratio of temperature range and the resulting plastic strain range in the solder joint, ΔT/Δεp, remains constant.

Recent work by Pan, et al. has resulted in a modified NL for SnAgCu solder (SAC). Several area array and alloy 42 leadframe devices were subjected to a range of thermal cycling tests. The most extreme was -25 to 125°C and the most benign was 0 to 60°C. Dwell times range from 10 minutes to 6 hours. The resulting characteristic life, time to 63% failure, ranged from 650 cycles to almost 10,000, depending upon the device and the thermal cycle.

Curve-fitting of the above results provided a modified NL equation for SAC:

This new model is a good first-pass approach towards extrapolating time to failure from accelerated test conditions. It does show some deviation from test results and finite element analysis predictions as test conditions become more extreme and field conditions become more benign. Areas of potential concern include:

• Test conditions where the ramp times are significantly longer than the dwell times. The NL equation does not take into account ramp times
• Test conditions at -55°C or below could induce more brittle behavior
• Times to failure exceeding 10,000 cycles (outside the dataset used to develop these constants). This is equivalent to 27 years of diurnal cycling

As an example, DfR recently performed a reliability prediction for a SAC-soldered 2512 resistor subjected to accelerated testing (-55 to 125°C) and diurnal cycling (ΔT of 25°C every day). The results were 1,250 cycles and greater than 35,000 cycles, respectively. Inputting the accelerated test results into the modified NL equation resulted in a diurnal life prediction of over 300,000 cycles to failure.

Mechanical Shock

Some studies have shown that SAC (SnAgCu) solder alloys can fail at loads up to 50% lower than SnPb when subjected to shock, drop, or static board bending. This loss in performance seems to come from a combination of brittle intermetallics, board degradation due to higher reflow temperatures, and a greater transfer of stress because SAC is a stiffer material than SnPb. While the final numbers are still to be determined, the relative behaviors have shown a strong dependence on strain rate.

There is some question as to whether this is a long-term reliability issue or an initial quality issue. Manufacturers of portable electronics, who have been Pb-free for several years, have reported no increase in field returns due to drops. Other companies are primarily focusing on maintaining better control over the manufacturing environment, specifically by reducing the maximum allowable strain values from 1000 to 750 or 500 microstrain (one micron of inplane movement for every mm of board length).

Vibration

Recent work by DfR Solutions is presented here. In summary, SAC seems to outperform SnPb a lower load levels, but additional strain levels and package types remain to be tested.